Srividhya, V.

• Vol 2, No 8 (2010) - Articles
  Power Optimization for Dual-Clock FIFO with Closedown Able and Reinstate Able Clock Domains
  Abstract
• Vol 1, No 6 (2009) - Articles
  Design of Novel Ultra-Low Leakage CMOS Sleepy Stack Structure for circuits with Low Leakage Power Consumption
  Abstract
• Vol 1, No 7 (2009) - Articles
  High-Speed 4 BIT Flash ADC Using CMOS Latched Comparator with Current Steering Logic SR Latch
  Abstract