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Network-on-Chip Design Space Exploration: A Hybrid Approach
Abstract
Network-on-Chip (NoC) has recently emerged as a communication solution for the most System-on-Chip (SoC) design. Design space exploration and performance evaluation are the most essential task in NoC design. In this paper, we adopted a hybrid approach for design space exploration of a NoC architecture having many-many binding between switches and IP’s. In our proposed methodology, we first mapped the target application onto a 2D mesh NoC architecture using Particle Swarm Optimization (PSO) algorithm to optimize energy consumption. Secondly, we bind the switch and core (IP) using genetic algorithm followed by a routing path allocation using PSO. The results show that our framework optimizes substantially the design matrices like energy,link bandwidth for target applications in compare to other frameworks.
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