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Power-Efficient Montgomery Modular Multiplication Review Using VLSI Architecture
Abstract
In Public key Cryptosystem like RSA and Elliptic Curve Cryptography (ECC), modular multiplication is a basic operation. A famous method to execute modular multiplication in hardware circuit is based on the Montgomery modular multiplication it has several benefits. Many Montgomery Modular multiplication hardware architecture and algorithm employ carry-save addition (CSA), to speed up the encryption/decryption process. An adiabatic logic brings about great deal of power minimization in digital circuit. This research paper presents a review of previous work done on modular multiplication and suggest a new CSA based Montgomery modular multiplier architecture designed utilizing adiabatic logic to make it low power consuming as compare to CMOS-Logic circuit.
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References
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