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Performance Comparison of Different 8-bit Multipliers
Abstract
In today’s era a multiplier is a one of the key component of large number of systems such as micro-processors, digital signal processor, FIR (Finite Impulse Response) filters etc. Performance of multiplier of any system determined the performance of that system because the multiplier is generally slowest element and most area consuming. In this paper we compare three 8-bit multipliers such as Shift and Add multiplier, Booth multiplier and Vedic multiplier with the concentration on two key parameters Delay and Area. Different multipliers are synthesized and simulated on Xilinx 14.7 ISE Simulator and implemented on FPGA Spartan-6, xc6slx25t device. Shift and Add multiplier has a delay of 15.232ns, Booth multiplier has a 20.643ns and Vedic multiplier (Vertically and crosswise) has 12.651 ns of delay. Numbers of LUTs occupy by Shift and Add, Booth and Vedic multiplier are 88, 183 and 73 respectively. The result of this paper helps to choose a better multiplier from available options for fabricating different systems.
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References
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