Open Access Open Access  Restricted Access Subscription or Fee Access

FPGA Based Implementation of Image Segmentation with Optimized Adaptive Median Filter

Chetan S. Deokar, V.B. Baru, Dhiraj M. Dhane

Abstract


FPGA (Field Programmable Gate Array) is utilized to realize the image segmentation. We describe a newfangled method for segmentation of 2-D imagery that uses resource optimized adaptive median filter for image enhancement. A pipelined implementation on FPGA for this algorithm is designed. Sobel operator is used for edge detection. Processed results of test images are presented to illustrate the performance capabilities of the proposed method. Comparison table and resource summaries are provided.

Keywords


FPGA, Image Segmentation, Sobel-Operator, Median, Adaptive Median Filter (AMF).

Full Text:

PDF

References


Chetan S. Deokar, Dhiraj M. Dhane,“ FPGA based implementation of real-time image segmentation”, Proc. International Conference on Information and Communication Technology (ICICT2010), Madurai, India, Dec.16-17, 2010, PP. 171-173.

Miguel A. Vega-Rodríguez, Juan M. Sánchez-Pérez, Juan A. Gómez-Pulido, “An FPGA-based Implementation for Median Filter Meeting Real-time Requirements of Automated Visual Inspection Systems”, 10th Mediterranean Conference on Control and Automation - MED2002 Lisbon, Portugal, July 9-12, 2002.

Hong Shan Neoh, Asher Hazanchuk, “Adaptive Edge Detection for Real-Time Video Processing using FPGAs, Altera Corporation, Innovation Drive.

Chetan S. Deokar, S. S. Pujari, “Real Time Video Filter Implementation on FPGA”, Proc. National Conference on Signal Processing & Communication (ETSPC-07), Pune, India, Dec.27-29, 2007, PP. 175-177.

Zdenek Vasicek, Lukas Sekanina, “Novel Hardware Implementation of Adaptive Median Filters”,978-1-4244-2277-7.


Refbacks

  • There are currently no refbacks.


Creative Commons License
This work is licensed under a Creative Commons Attribution 3.0 License.