In most of the DSP (Digital Signal Processing) and multimedia communication applications the important operations are multiplication and accumulation. Real time signal processing requires a low power consumption, lower delay and highspeed MAC (Multiplier-Accumulator) unit. Multiply and Accumulator (MAC) unit is the backbone of DSP processors. So its design and performance will define the efficiency of the overall system working and its accuracy. The proposed system is to design Multichannel MAC unit which will achieve high speed multiplication and accumulation by CSA (Carry Save Adder) and Multiplication using Modified Radix 4 Booth Algorithm. Here 4 MAC unit of each 32 bit is integrated parallelly and the input data is given from control logic. Carry Save adder is used to reduce the delay time and Modified Radix 4 Booth multiplication algorithm is used to reduce the partial products with this overall helps in increasing the speed of the MAC. The proposed design is developed, simulated and synthesized using Xilinx ISE showing the results in terms of reduced delay, less power and lower delay