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Design and Simulation of Serial and Parallel PG-LDPC Decoder

M.M. Vijay, K. Mohaneswari

Abstract


This paper aims to develop a serial and parallel Projective geometric LDPC decoder. The Low-Density Parity-Check codes are among the most powerful forward error correcting codes. LDPC codes are recently used for many high bandwidth applications. A parallel decoding scheme is also proposed to shorten the decoding time. Parallel architecture is employed here to increase the throughput. The proposed decoder is verified through simulation and the results are presented. In this work, Xilinx/Modelsim simulations of the serial and parallel Projective geometric LDPC decoder have been performed With the (7, 3) PG-LDPC code, the implemented parallel decoder requires less decoding time than the serial decoder.

Keywords


Projective Geometric (PG), LDPC

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References


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