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Design and Simulation of Analogue Integrated Circuit for ART1 Neural Network

Mereya Baby, R. Thilepa

Abstract


This paper outlines the design and simulation of an analog integrated circuit which performs the same functionality as the ART1 neural network. ART has been developed to avoid the stability-plasticity dilemma in competitive networks learning. ART1 is designed to cluster binary input vectors, allowing for great variations in the number of nonzero components, and the direct user control of the degree of similarity among patterns placed on the same cluster unit [2]. The neural network incorporates both F1 and F2 layers in conjunction with their interconnections. The circuit design is based on a set of differential equations which describes the behavior of the neural network and on analog electronic components such as operational amplifiers which are relatively inexpensive and have been widely used in many circuit applications. The one node circuit developed here can be used as a subscript for a larger ART1 neural network with an arbitrary number of nodes. The circuits designed will be verified using software proteus.

Keywords


Adaptive Resonance Theory1 (ART1), Short Term Memory, Training, Proteus

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References


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