A 1.5V, 2.4 GHz CMOS Front-End Design Evaluation for IEEE 802.11b/g Application
This paper describes the design evaluation of a 1.5V,2.4 GHz CMOS RF receiver front-end system consists of a low noise amplifier (LNA), down-conversion mixer and digitally controlled ring oscillator for Direct Conversion specification of IEEE 802.11b/g application. The designed LNA uses inductively degenerated Common Source-Common Gate stage (CS-CG) structure to enhance the gain and impedance matching. The mixer uses Switched – Transconductance Gilbert cell architecture for the betterment of noise figure. Also the tristate –inverter based 8-Bit Digitally controlled ring oscillator designed for generating local oscillator frequency. The front end blocks performance are analyzed by using Intel Core2DuoCPU E7400@2.80GHz processor with Agilent’s Advanced Design System (ADS) EDA tools and Microwind 2.7 version software. The design simulation process has been carried out in a standard TSMC 0.18-μm CMOS process technology. The LNA achieves a power gain of 18.35 dB and input reflection coefficient of -12.5 dB at 2.4 GHz RFfrequency. Also the mixer exhibits a noise figure of 13 dB and conversion gain of 39 dB. The schematic and layout developed for ring oscillator whose frequency of oscillation observed as 2.25GHz.
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