Simulation and Synthesis of an MPLS Network

Abstract

This paper presents a hierarchical approach for modeling an MPLS (Multi Protocol Label Switching) network. The MPLS technology is used because it offers a better performance and flexibility than IP routing. Six MPLS switches are modeled and simulated. A label is assigned to the IP packet header that indicates the route that the frame should follow. The first MPLS switch analyzes the IP header of the frame and assigns it a label which depends on its switching table. In this MPLS switch the label is considered the frame header instead of IP address. The label assigned to the frame arrives to any of the middle switches where the label is analyzed and changed by the switching table of the corresponding MPLS switch. Finally, when the packet is leaving, the MPLS network through the output switch, the label is analyzed and removed depending on the switching table. At this stage, the frame header is again the IP address. The frame continues its path outside the MPLS network. A VLSI implementation of MPLS network is done. At first, an MPLS network is simulated then it is synthesized