Realization Model of Non-Volatile SRAM Using Magnetic Tunnel Junction

Abstract

In the last 10 years, FPGA circuits have developed rapidly, because of their flexibility, their ease of use and the low cost to design a function with them. However, the internal memories used in FPGA circuit could limit their future use. Most FPGA circuits use SRAM based flip-flop as internal memory. But since SRAM is volatile, both the configuration and information stored is lost. Internal Flash technology is sometime used to replace the external memory. However, it’s slow re-programming and its limited number of writing cycles (up to 106) prevents its use to replace SRAM. By working at high writing and reading speed, MRAM (Magnetic RAM) technology is one of the best solutions to bring complete non-volatility to the FPGA technology while keeping the power dissipation low. An MRAM can be re-programmed 1012times and has a large retention time up to 10 years. This technology is now mature and a lot of progress in its development has been done lately, especially by IBM, Freescale and Samsung [1].