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A Novel Optimization Technique for Multi-Domain Clock Skew Scheduling

I. Flavia Princess Nesamani, K. MariyaPriyadarshini, J. Kanaka Deva Princy, V. Lakshmi Prabha

Abstract


The application of general clock skew scheduling is practically limited due to the difficulties in implementing a wide spectrum of dedicated clock delays in a reliable manner. This results in a significant limitation of the optimization potential. As an alternative the application of multiple clocking domains with dedicated clock buffer will be implemented. In this paper, an algorithm for determining the minimum number of clock domains to be used for multi domain clock skew scheduling is presented. The experimental results show the optimized clock period, dynamic power consumption implemented on the traffic light controller.

Keywords


Clock Skew Domain, Clock Skew Scheduling (CSS) Low Power VLSI, Synopsys Design Compiler

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References


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