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An FPGA Based TRR Algorithm for Gating Pulse Generation to Power Converters

S. Ramkumar, V. Kamaraj, S. Thamizharasan, S. Jeevananthan

Abstract


The recent developments in the field VLSI made Field Programmable Gate Arrays (FPGA) as one of the principal components in high performance processors especially in the area of communication engineering and power conversion utilities. FPGA have become an alternative solution for the realization of digital control systems, previously dominated by general purpose microprocessors/microcontrollers. In this paper, a reconfigurable Application Specific Integrated Circuit(ASIC) based on FPGA, used a gating pulse generator to generate gating pulses for power converters is presented. In addition, Modelsim SE is used for simulation study and validation of the proposed algorithm before implementation.

Keywords


FPGA, Programmable Architecture, Multilevel Inverter, Pulse Width Modulation

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References


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