Open Access Open Access  Restricted Access Subscription or Fee Access

A Survey on Low Area and Low Power Parallel FIR Filter

S. Balasubramaniam, R. Bharathi


With the explosive growth of multimedia applications, the demand for high performance and low power digital signal processing is getting higher and higher. Finite impulse response (FIR) filters are one of the most widely used fundamental devices performed in DSP systems. This Paper presents a survey on designing Low Area and Low Power Parallel FIR Filter. By using Fast FIR filtering algorithms (FFA), this parallel FIR structures can Lead to significant hardware savings from the existing FFA Parallel FIR filter. In this paper, Traditional FIR filter structure and FFA based FIR filter structure, Symmetric convolution based FFA FIR filter structure are designed for 2-parallel (2×2) and 3-parallel (3× 3).


Digital Signal Processing (DSP), Fast Finite Impulse Response(FIR) Algorithms (FFA), Parallel FIR, Very Large Scale Integration(VLSI) .

Full Text:



Area efficient low power parallel FIR filter. D.A parker & K.K. Parhi, VLSI signal process system .1997, 75-92, vol.17, no 1

Frequency spectrum based low area low power parallel FIR Filter.J.G.chung and k.k parhi, EURASIP J. Applied signal process.2002, volume 2002, no: 9, pp 444-453

Hardware efficient pipeline programmable FIR filter design. T.S. change and C.W.Jen, IET Journals 2001, volume 148, Issue no: 6, page no: 227-232.

Hardware efficient fast parallel FIR filter structure Based on Iterated short convolution.Chawcheng, K.K.Parhi, IEEE Transactions. 2004, vol.51, no 8.

Short length FIR filters and their use in fast Non recursive filtering.Zhi-jion mou, Pierre Duhamel. IEEE transaction on signal processing. June 1991 Vol 39 no.6

Computational structure for fast implementation of L-path and L-block digital filter, Jose I.Acha, IEEE transaction on circuit and systems, Volume 36 No 6 Year 1989.

Overlapped block digital filtering. Ing song lin and Sanjit k Mitra, IEEE transaction on circuit and systems.1996, Vol .43 NO.8

Low cost parallel FIR structure with 2 stage parallelism. C.Cheng and K.K.Parhi 2007 Feb, Vol: 54 No: 2, P.P 280-290.

Low power and area efficient FIR filter Implementation suitable for multiple taps. IEEE transaction on VLSI. Vol.11 No.1 Feb 2003.

Area Efficient Parallel FIR Digital Filter structure for symmetric convolution based on Fast FIR Algorithm. Yu-chi Tsao and Ken choi, (Accepted for publication) IEEE Transactions on VLSI,(To be published)

Y. C. Lim. Design of discrete-coefficient-value linear phase FIR filters with optimum normalized peak ripple magnitude. IEEE "transactions on Circuits and Systems, 37(12):1480-1486, December 1990.

Y. C. Lim and A. G. Constantinidies. Linear phase FIR digital filter without multipliers. In Proceedings of IEEE International Symposium on Circuits and Systems, pages 185-188, Tokyo, Japan, July 1983.

Y. C. Lm and B. Liu. Design of cascade form FIR filters with discrete valued coefficients. IEEE transactions on Acoustics, Speech, and Signal Processing, pages 1735-1730, November 1988.

Y. C. Lm and S. R. Parker. FIR filter design over a discrete powers-of-two coefficient space. IEEE transactions on Acoustics, Speech, and Signal Processing, pages 583-591, .June 1983.

Zhi-Jian Mou and Pierre Duhamel. Fast FIR filtering: Algorithms and imtplemeutations. Signal Processing,13(4):377-384, December 1987.

Zhi-Jian Mou and Pierre Duhamel. A unified approach to the fast FIR fi1te:ring algorithms. In Proceedingsof IEEE Intemational Conference on Acoustics, Speech and Signal Processing, pages 1914-1917, New York, NY, April 1988.

Zhi-Jian Mou and Pierre Duhamel. Short-length FIR filters and their use in fast nonrecursive filtering IEEE "hnsactions on Signal Processing, 39(6):1322-1332, June 1991.

Keshab K. Parhi. Algorithms and architectures for high-speed and low-power digital signal processing.In Pmceedings of 4th Intematwnol Conference on Advances in Communiications and Control, pages259-270, modes, Greece, June 1993.

Keshab K. Parhi. 'Ikading off concurrency for low-power in linear and non-linear computations. In Pmceedings of the IEEE Workshop on Nonlineor Signal Processing, pages 895-898, Halkidiki, Greece,June 1995.

A. Zergainoh and P. Duhamel. Implementation and performance of composite fast FIR filtering algorithms.In IEEE Signal Processing Society Workshop on VLSI Signal Processing, pages 267-276, Sakai,Japan, October 1995.


  • There are currently no refbacks.

Creative Commons License
This work is licensed under a Creative Commons Attribution 3.0 License.