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Sub-mW Low Noise Amplifier Using Active Inductor for Ultra Wideband Application

Mileshwar Sinha, Khemraj Deshmukh

Abstract


In this paper we work on the control of total power consumption of a low noise amplifier using unique design of CMOS active inductor (on chip) for the low voltage RF circuit. We tried to address a replacement methodology of passive inductors by Active Inductors (AI) to improve the circuit performance. And improved parameter like power potency, Noise Figure (NF) and alternate methodology of input and output matching of 50 ohm. Exploiting the new biasing metric, and new design methodology of 1.8v supply, leads to 5.4mW total DC power consumption. We uses 180nm CMOS technology, frequency range of 2-6GHz. This simulation offers the thought of the longer term analysis to design higher LNA in terms of low power consumption, stability and higher range of frequency of operation.


Keywords


CMOS, IC (Integrated Circuit), LNA (Low Noise Amplifier) Low Power, Low Voltage, Stability, RF (Radio Frequency), S-Parameter, ULP (Ultra Low Power).

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References


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