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Area Minimization of Carry Select Adder Using Boolean Algebra

N. Banupriya, S. Sathya Jothi, K. Sowmiya Ramadevi, R.  Vidya

Abstract


The requirements of the modern electronic devices are they must be less expensive, compact and have a power saving technology. In electronics, adder is a digital circuit that performs addition of numbers. To perform fast arithmetic operations, carry select adders as design by O.J. Bedrij is one of the fastest adders used in many data-processing processor. In this adder dual ripple carry adder one for CIN=1 and other for CIN=0 are used. Binary to excess-1 converters are used instead for RCA for CIN=1 in order to enhances the performance of the device. This paper proposes that the size of the adder is featured reduced by using Boolean algebraic techniques.


Keywords


Ripple Carry Adder, Binary to Excess-1 Converter, Multiplexer, Boolean Algebra.

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References


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DOI: http://dx.doi.org/10.36039/AA042015004.

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